The present invention relates generally to the field of electronic circuits and, in particular, to in-rush current protection.
In the field of telecommunications, it is customary to service equipment while operational to minimize the impact on service to customers. Therefore, it has become an industry standard that circuit boards or electronic modules should be both removeable and insertable under system power without damaging the sensitive electronic circuits on the circuit boards or electronic modules. Inserting and removing circuit boards in a live system, e.g., a powered system, is conventionally referred to as xe2x80x9chot swappingxe2x80x9d or xe2x80x9chot pluggingxe2x80x9d of circuit boards.
Unless precautions are taken, destructive inrush currents could damage the electronic circuits during hot swapping operations in a live system. These inrush currents flow in connector contacts and electrical components when a circuit card is plugged into a system under power. If inrush current is not limited in some way, peak current levels can exceed electrical component ratings, thereby destroying functional circuits on the card.
For example, when currents are not intentionally limited, common solid state digital circuits and switching power converters could be damaged by inrush currents. It is the nature of common solid state digital circuits and switching power converters to incorporate substantial amounts of capacitance across the input power terminals to improve power regulation, reduce electrical noise and prevent electromagnetic radiation. When these uncharged capacitors are suddenly connected to a power source with low impedance, currents flow so as to charge the capacitors up to the power source voltage potential. These inrush currents are limited only by circuit resistances, which are intentionally designed to be very low so as to provide low system loss and good voltage regulation. Because of this, inrush currents can easily exceed destructive levels of both connector materials and electrical components. Adding resistance is of course undesirable as it will result in power loss and degrade voltage regulation, both which affect system performance.
Although current limiting circuitry is both fairly simple and inexpensive, a large number of solutions already exist. There are drawbacks to many conventional approaches to inrush current limiting. One approach to current inrush limiting is described in U.S. Pat. No. 5,079,455 (The ""455 Patent). The circuit shown in the ""455 Patent has at least two drawbacks.
The first drawback with the circuit shown in the ""455 Patent relates to the manner in which the load is discharged upon disconnection from the power supply. In a common application of the current limiting circuit, the load includes a switching power supply which does not exhibit linear resistive characteristics. In fact, the switching power supply is highly nonlinear and frequently stops drawing current completely below a particular input threshold voltage level. As the transistor 14 has an intrinsic diode from source to drain, this effect of incompletely discharging the load capacitance can result in capactitors 20 and 22 remaining in a charged state when reinserted. The current limiting function of the circuit shown in the ""455 Patent can be severly compromised or negated entirely in this arrangement.
The second drawback relates to regulation of the voltage at the gate of transistor 14 in the ""455 Patent. Specifically, in a typical telecommunications application, a voltage of 48 volts is typically applied across the input terminals. During the time interval between application of input power and turn on of transistor 14, capacitor 22 is charged exponentially toward 48 volts with a time constant determined by resistors 16 and 18 and capacitor 22. Due to the high voltage applied to the RC circuit, relatively high time constants (high component values) are required to achieve acceptable operation. Further, diode 24 exhibits imprecise voltage limiting characteristics at low current levels in conjunction with substantial leakage currents at voltages below the normal turn on point necessitating lower resistance values in the configuraion shown in the ""455 Patent.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for a technique for limiting currents below destructive values during xe2x80x9chot pluggingxe2x80x9d while offering low loss under normal operating conditions.
The above-mentioned problems with in-rush current protection and other problems are addressed by embodiments of the present invention and will be understood by reading and studying the following specification. Specifically, embodiments of the present invention provide for limiting in-rush current when hot plugging an electronic module by controllably turning on a transistor to provide a substantially linear voltage ramp to a functional circuit.
In one embodiment, a circuit for controlling inrush current to a load is provided. The circuit includes a variable impedance device having a control input. The variable impedance device is coupled between a power supply interface and a load interface. The circuit also includes a control circuit coupled to the control input of the variable impedance device and also coupled to the load interface. The control circuit is adapted to provide a signal at the control input of the variable impedance device which results in a linear increase in applied voltage to the load when the circuit is coupled to an input power source. A resistor is coupled between the first and second terminals of the power supply interface to provide a current discharge path for the control circuit when the circuit is disconnected from the power supply.
In another embodiment, a circuit for controlling inrush current to a load is provided. The circuit includes a power supply interface having first and second terminals adapted to be coupled to first and second terminals of a power supply. The circuit further includes a load interface having first and second terminals, adapted to be coupled to the load. The circuit further includes a variable impedance device having a control input. The variable impedance device is coupled between the power supply interface and the load interface. The variable impedance device includes a controllable current path between the power supply interface and the load interface. The circuit also includes a control circuit coupled to the control input of the variable impedance device and also coupled to the second terminal of the load interface. The control circuit is adapted to provide a signal at the control input of the variable impedance device which results in a linear increase in applied voltage to the load when the circuit is coupled to an input power source. A first resistor is coupled between the first terminal of the power supply interface and the control input of the variable impedance device. A second resistor is coupled between the first and second terminals of the power supply interface to provide a current discharge path for the first control circuit when the circuit is disconnected from the first and second terminals of the power supply.